 |
S5-PCIe
VITA 57 FMC Site A (optional)
- 10x high-performance SerDes
- 80 LVDS
- Clocks, I2C, JTAG, and reset
VITA 57 FMC Site B
- 48 LVDS
- Clocks, I2C, JTAG, and reset
FPGA
- Altera® Stratix® V GX/GS FPGA
- Supported by BittWare’s ATLANTiSTM FrameWork
- 26 full-duplex, high-performance, multi-gigabit SerDes transceivers @ up to
14.1 GHz
- More than 1 million logic elements (LEs) available
- Up to 50 Mb of embedded memory
- 1.4 Gbps LVDS performance
- Up to 3,510 variable-precision DSP blocks
- Embedded HardCopy Blocks
External Memory
- Two banks of up to 16 GByte DDR3 SDRAM x 72 with ECC
- 128 MBytes of Flash memory for booting FPGA
PCIe Interface
- x8 Gen1, Gen2, Gen3 direct to FPGA
USB Header
- USB 2.0 interface for debug and programming
Debug Utility Header
- RS-232 port to Stratix V
- JTAG debug interface to Stratix V
QSFP+ Cages (optional)
- 2 QSFP+ cages on front panel connected to FPGA via 8 SerDes
Size
- Full-length, standard-height PCIe slot card
|
